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Editorial Advisory Board

  • Professor Andrea M. Armani, University of Southern California
  • Ruti Ben-Shlomi, Ph.D., LightSolver
  • James Butler, Ph.D., Hamamatsu
  • Natalie Fardian-Melamed, Ph.D., Columbia University
  • Justin Sigley, Ph.D., AmeriCOM
  • Professor Birgit Stiller, Max Planck Institute for the Science of Light, and Leibniz University of Hannover
  • Professor Stephen Sweeney, University of Glasgow
  • Mohan Wang, Ph.D., University of Oxford
  • Professor Xuchen Wang, Harbin Engineering University
  • Professor Stefan Witte, Delft University of Technology

ASE Introduces VIPack™ to Help Transform Packaging Solution Enablement

Advanced Semiconductor Engineering, Inc. (ASE), a member of ASE Technology Holding Co., Ltd. (NYSE: ASX, TAIEX: 3711), today introduced VIPack™, an advanced packaging platform designed to enable vertically integrated package solutions. VIPack™ represents ASE’s next generation of 3D heterogeneous integration architecture that extends design rules and achieves ultra-high density and performance. The platform leverages advanced redistribution layer (RDL) processes, embedded integration, and 2.5D and 3D technologies to help customers achieve unprecedented innovation when integrating multiple chips within a single package.

As our world navigates the data centric era, the semiconductor market is growing exponentially, with the growth behind the data coming from devices used across Artificial Intelligence (AI), Machine Learning (ML), 5G Communications, High Performance Computing (HPC), Internet-of-Things (IoT), and Automotive applications. Demand for innovative package and IC co-design, cutting-edge wafer level fabrication processes, sophisticated packaging technologies, and comprehensive product and testing solutions has never been greater. The role of packaging has become increasingly critical, as applications call for solutions to enable higher performance, greater functionality, and improved power, while meeting stringent cost parameters. The rising adoption of chiplet-based co-designs is further fueling demand for multi-chip integration into a single package. The launch of VIPack™ firmly establishes a collaborative platform for exceptional interconnect solutions where 3D heterogeneous integration has become critical.

ASE’s VIPack™ is comprised of six core packaging technology pillars supported by a comprehensive and integrated co-design ecosystem. These include ASE’s high density RDL-based Fanout Package-on Package (FOPoP), Fanout Chip-on-Substrate, (FOCoS), Fanout Chip-on-Substrate-Bridge (FOCoS-Bridge), and Fanout System-in-Package (FOSiP) as well as Through Silicon Via (TSV)-based 2.5D and 3D IC and Co-Packaged Optics processing capabilities. The VIPack™ platform provides the capabilities necessary to enable trailblazing highly integrated silicon packaging solutions required to optimize clock speed, bandwidth, and power delivery, and to reduce co-design time, product development, and time to market. “Critical new innovations such as double-sided RDL have allowed a series of new vertically integrated package technology pillars that create the backbone of our VIPack™ platform,” commented Mark Gerber, Sr. Director of Technical Marketing and Promotion at ASE.

The VIPack™ platform delivers the dense horizontal and vertical interconnect solutions required to interconnect disaggregated SoCs (System-on-Chip) and HBM (High Bandwidth Memory) used for leading-edge HPC, AI, ML, and Network applications. High-speed networking is also being challenged with several complex components for optical packaging that require VIPack™ innovation to bring these components together in a vertical structure for both space and performance enablement. Applications supported by VIPack™ further extend to the mobile market with ultra-low profile SIP modules to address the common RF iterative design process and enable a higher level of performance with integrated passives in the RDL layers. Additionally, the next generation of application processors address the demand for lower profile package solutions, while solving power delivery issues for advanced silicon nodes.

“ASE is delighted to bring its VIPack™ platform to market, opening up new opportunities for our customers to innovate from the design process all the way to production and to reap extensive benefits in relation to functionality, performance, and cost,” said Dr. C.P. Hung, Vice President of R&D, ASE. “As the world’s leading OSAT, ASE is strategically positioned to help customers improve efficiency, speed time-to-market, and sustain profitable growth. VIPack™ underscores our commitment to deliver our most innovative packaging technologies to date.”

“Our expanding digitized world is driving unparalleled innovation across the semiconductor industry and VIPack™ represents a crucial leap forward in the transformational packaging technologies required to achieve the highly complex system integration our customers need to remain competitive,” said Yin Chang, Senior Vice President of Sales and Marketing. “Through VIPack™, we’re empowering our customers to discover new efficiencies in their semiconductor design and manufacturing process and to reimagine the integration technologies required to accomplish application excellence.”

Available now, ASE’s VIPack™ is a scalable platform that will expand in alignment with industry roadmaps.

Supporting resources

  • For more about VIPack™, please visit www.ase.aseglobal.com/VIPack
  • Read Mark Gerber’s Blog on VIPack™ announcement
  • Visit the ASE Booth at ECTC 2022 in San Diego, CA, June 1-2, 2022
  • Follow us on our LinkedIn page for targeted updates and announcements @asegroup_global
  • Follow us on Twitter @asegroup_global

About ASE, Inc.

ASE, Inc. is the leading global provider of semiconductor manufacturing services in assembly and test. Alongside a broad portfolio of established assembly and test technologies, ASE is also delivering innovative advanced packaging and system-in-package solutions to meet growth momentum across a broad range of end markets, including 5G, AI, Automotive, High Performance Computing, and more. To learn about our advances in SiP, Fanout, MEMS & Sensor, Flip Chip, and, 2.5D, 3D & TSV technologies, all ultimately geared towards applications to improve lifestyle and efficiency, please visit: aseglobal.com or follow us on Twitter: @asegroup_global.

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