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Editorial Advisory Board

  • Professor Andrea M. Armani, University of Southern California
  • Ruti Ben-Shlomi, Ph.D., LightSolver
  • James Butler, Ph.D., Hamamatsu
  • Natalie Fardian-Melamed, Ph.D., Columbia University
  • Justin Sigley, Ph.D., AmeriCOM
  • Professor Birgit Stiller, Max Planck Institute for the Science of Light, and Leibniz University of Hannover
  • Professor Stephen Sweeney, University of Glasgow
  • Mohan Wang, Ph.D., University of Oxford
  • Professor Xuchen Wang, Harbin Engineering University
  • Professor Stefan Witte, Delft University of Technology

AMD Introduces Versal RF Series Adaptive SoCs Offering the Industry’s Highest Compute in a Single-Chip Device with Integrated Direct RF-Sampling Converters

SANTA CLARA, Calif., Dec. 10, 2024 (GLOBE NEWSWIRE) -- AMD (NASDAQ: AMD) today announced the expansion of the AMD Versal™ adaptive system-on-chip (SoC) portfolio with the introduction of the Versal RF Series that includes the industry’s highest compute performance in a single-chip device with integrated direct radio frequency (RF)-sampling data converters.1

Versal RF Series offers precise, wideband-spectrum observability and up to 80 TOPS of digital signal processing (DSP) performance2 in a size, weight, and power (SWaP)-optimized design, targeting RF systems and test equipment applications in the aerospace and defense (A&D) and test and measurement (T&M) markets, respectively.

Building on the success of the existing AMD Zynq™ RFSoC devices, the highly integrated Versal RF Series heterogeneous computing solution is the 5th generation of AMD direct RF devices and the industry’s first to combine high-resolution RF data converters, hard IP DSP compute blocks and AI Engines for DSP, along with adaptive SoC programmable logic and an Arm® subsystem in a monolithically integrated, single-chip device.

“Today’s advanced RF systems require high resolution and high sample-rate RF data converters that use massive amounts of DSP compute resources to process data quickly and adapt to changing requirements, shifting workloads and mission profiles,” said Salil Raje, senior vice president and general manager, Adaptive and Embedded Computing Group, AMD. “AMD Versal RF Series adaptive SoCs meet these requirements in a single chip, offering leadership RF-sampling resolution and more DSP compute than multiple SoCs combined.”3

Precise, Wideband-Spectrum Observability
Versal RF Series adaptive SoCs enable simultaneous capture and analysis of wideband-spectrum with high-resolution, multi-channel RF-converters and low-latency processing. The monolithically integrated, high-resolution (14-bit with calibration), 32 gigasamples-per-second (GSPS), 18 GHz RF analog-to-digital converters (RF-ADCs) enable accurate, flexible and fast signal characterization and analysis across a wide observable spectrum for mission critical A&D applications such as phased array radar, electromagnetic spectrum operations, signals intelligence, and military and satellite communication terminals.

For T&M applications such as high-speed oscilloscopes and wideband spectrum analyzers and generators, the Versal RF Series provides a highly integrated solution with multiple RF channels up to Ku band and enables advanced T&M signal processing functions such as arbitrary resampling and spectral analysis. Direct RF sampling up to 18 GHz and up to 32 GSPS enable multi-GHz of RF bandwidth to be digitized on multiple channels simultaneously.

Massive DSP Compute
The Versal RF Series delivers up to 80 TOPS of DSP compute with up to 19X more DSP compute, in channelizer mode, compared to the current generation AMD Zynq™ UltraScale+™ RFSoC device.4

Select DSP functions are implemented in dedicated hard IP blocks, including 4 GSPS FFT/iFFT, channelizer, polyphase arbitrary resampler, and LDPC decoder, reducing dynamic power consumption by up to 80 percent compared to an AMD soft logic implementation.5

SWaP-Optimized
The combination of direct RF-sampling data converters, DSP hard IP blocks, AI Engines and adaptive SoC logic in a monolithic implementation provides a flexible device with optimized SWaP, crucial for advanced signal processing applications in the A&D and T&M markets.

Key DSP functions implemented in dedicated IP blocks deliver significant power and area savings compared to soft logic implementations and allow more compute in the same physical area to meet constrained form factor requirements. The total DSP compute provided by the top of stack Versal RF Series devices would require multiple FPGAs for an equivalent computing solution.6 The amount of programmable logic required to meet processing requirements is also minimized, further reducing size and weight.

Versal RF Series development tools are available now. Silicon samples and evaluation kits are expected to be available in Q4 2025, with production shipments expected to begin in the first half of 2027.

Supporting Resources

About AMD
For more than 50 years AMD has driven innovation in high-performance computing, graphics and visualization technologies. Billions of people, leading Fortune 500 businesses and cutting-edge scientific research institutions around the world rely on AMD technology daily to improve how they live, work and play. AMD employees are focused on building leadership high-performance and adaptive products that push the boundaries of what is possible. For more information about how AMD is enabling today and inspiring tomorrow, visit the AMD (NASDAQ: AMDwebsiteblogLinkedIn, and X pages.

©2024 Advanced Micro Devices, Inc. All right reserved. AMD, the AMD Arrow logo, UltraScale, Versal, Virtex, Zynq and combinations thereof are trademarks of Advanced Micro Devices, Inc. Other products names used herein are for identification purposes and may be trademarks of their respective owners.

1 Based on an AMD internal analysis comparing the theoretical processing capability (including hard IP, AIEs, and DSPs) of the Versal RF VR1902 and VR1952 devices versus the largest Intel Agilex 9 Direct RF-Series ARGW027 device and ADI Apollo AD 9084 and 9088 devices. Results may vary based on device, configuration, design, and other factors. (VER-071)

2 Tera operations per second (TOPS) for an AMD Versal RF Series device is the maximum number of operations per second that can be executed in an optimal scenario and may not be typical. TOPS will vary based on device, design, configuration, and other factors. (VER-084)

3 Based on an AMD internal analysis, in November 2024, to compare the amount of DSP processing, AI Engine compute, and RF- sampling converter capabilities offered by one (1) Versal RF VR1652 device (single chip) versus that of four (4) Virtex UltraScale+ VU13P devices + one (1) Versal AI Core Series VC1702 device + one (1) ADI discrete AD9084 RF converter. Results will vary based on device, design, configuration, and other factors. (VER-077)

4 Based on AMD internal analysis to calculate the theoretical DSP compute (including hard IP, AI Engines, and DSP) in channelizer mode offered by the Versal RF Series devices versus the published DSP compute of the previous-generation Zynq UltraScale+ RFSoC Gen 3, as of September 2024. Actual results will vary based on configuration, device, design, and other factors. (VER-068)

5 Based on an AMD engineering projection of hard IP power values, November 2024. AMD Power Design Manager (2023.2.2) used to determine total power of soft logic, based on Vivado 2023.2.2 IP catalog. (VER-074)

6 Based on an AMD internal analysis (including hard IP, AI Engines, and DSP) to calculate the TOPS offered by a single (1) Versal RF VR1652 device versus the TOPS of one (1) Intel Agilex Direct RF-Series ARGW014 FPGA and two (2) additional Intel Agilex 7 Series AGI022 FPGAs. Results may vary based on device, configuration, design, and other factors. (VER-070)

Media Contacts:
Brian Garabedian
 AMD Communications
+1 408-386-4621
Brian.Garabedian@AMD.com

Mitch Haws
AMD Investor Relations
+1 408-749-2845
Mitch.Haws@amd.com


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